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Complete 450MHz Quadrature Transmitter
Internal to the IC, the charge pump has a leakage of less
than 10nA. This is equivalent to a 300M ? shunt resistor.
The charge-pump output must see an extremely high
DC resistance of greater than 300M ? . This minimizes
charge-pump spurs at the comparison frequency. Make
sure there is no solder flux under the varactor or loop filter
and use low-leakage capacitors.
Layout Considerations
The MAX2370 EV kit can be used as a starting point for
layout. For best performance, take into consideration
power-supply issues as well as RF, LO, and IF layout.
Power-Supply Layout
To minimize coupling between different sections of the
IC, the ideal power-supply layout is a star configuration,
which has a large decoupling capacitor at a central
V CC node. The V CC traces branch out from this node,
each going to a separate V CC pin of the MAX2370. At
the end of each trace is a bypass capacitor with imped-
ance to ground less than 1 ? at the frequency of inter-
est. This arrangement provides local decoupling at
each V CC pin. Use at least one via per bypass capaci-
tor for a low-inductance ground connection. Also, con-
nect the exposed paddle to the PC board GND with
multiple vias to provide the lowest inductance ground
connection possible.
Matching Network Layout
The layout of a matching network can be very sensitive to
parasitic circuit elements. To minimize parasitic induc-
tance, keep all traces short and place components as
close to the IC as possible. To minimize parasitic capaci-
tance, a cutout in the ground plane (and any other planes)
below the matching network components can be used.
Keep traces short on the high-impedance ports (e.g., IF
inputs and outputs) to minimize shunt capacitance.
Tank Layout
Keep the traces coming out of the tank short to reduce
series inductance and shunt capacitance. Keep the
inductor pads and coupling capacitor pads small to
minimize stray shunt capacitance.
Chip Information
PROCESS: BiCMOS
10
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